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74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Rev. 01 -- 6 October 2006 Product data sheet
1. General description
The 74HC2G17; 74HCT2G17 is a high-speed Si-gate CMOS device. The 74HC2G17; 74HCT2G17 provides two non-inverting Schmitt trigger buffers. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.
2. Features
I I I I Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: N HBM JESD22-A114-D exceeds 2000 V N MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Unlimited input rise and fall times Multiple package options Specified from -40 C to +85 C and -40 C to +125 C
I I I I I
3. Applications
I Wave and pulse shaper for highly noisy environments I Astable multivibrators I Monostable multivibrators
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
4. Ordering information
Table 1. Ordering information Package Temperature range Name 74HC2G17GW 74HC2G17GV 74HCT2G17GW 74HCT2G17GV -40 C to +125 C -40 C to +125 C -40 C to +125 C -40 C to +125 C SC-88 SC-74 SC-88 SC-74 Description plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads Version SOT363 SOT457 SOT363 SOT457 Type number
5. Marking
Table 2. Marking Marking code HV HV TV TV Type number 74HC2G17GW 74HC2G17GV 74HCT2G17GW 74HCT2G17GV
6. Functional diagram
1 1 1A 1Y 6
6
3
2A
2Y
4
3
4
mnb066
mnb067
Fig 1. Logic symbol
Fig 2. IEC logic symbol
1A
1Y
2A
2Y
mnb068
Fig 3. Logic diagram
74HC_HCT2G17_1
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Product data sheet
Rev. 01 -- 6 October 2006
2 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
7. Pinning information
7.1 Pinning
74HC2G17 74HCT2G17
1A GND 1 2 6 5 1Y VCC 2Y
2A
3
001aaf201
4
Fig 4. Pin configuration
7.2 Pin description
Table 3. Symbol 1A GND 2A 2Y VCC 1Y Pin description Pin 1 2 3 4 5 6 Description data input ground (0 V) data input data output supply voltage data output
8. Functional description
Table 4. Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level.
Function table[1] Output nY L H
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
3 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
9. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
Conditions VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V VO = -0.5 V to VCC + 0.5 V
[1] [1] [1] [1] [1]
Min -0.5 -65
[2]
Max +7.0 20 20 25 50 -50 +150 250
Unit V mA mA mA mA mA C mW
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
10. Recommended operating conditions
Table 6. Symbol VCC VI VO Tamb VCC VI VO Tamb Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature supply voltage input voltage output voltage ambient temperature Conditions Min 2.0 0 0 -40 4.5 0 0 -40 Typ 5.0 +25 5.0 +25 Max 6.0 VCC VCC +125 5.5 VCC VCC +125 Unit V V V C V V V C
Type 74HC2G17
Type 74HCT2G17
11. Static characteristics
Table 7. Static characteristics for 74HC2G17 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 C VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V
74HC_HCT2G17_1
Parameter
Conditions
Min
Typ
Max
Unit
1.9 4.4 5.9 4.18 5.68
2.0 4.5 6.0 4.32 5.81
-
V V V V V
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Product data sheet
Rev. 01 -- 6 October 2006
4 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Table 7. Static characteristics for 74HC2G17 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC CI VOH input leakage current supply current input capacitance HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V VI = VIH or VIL IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V 1.9 4.4 5.9 3.7 5.2 V V V V V 0.1 0.1 0.1 0.33 0.33 1.0 10.0 V V V V V A A 1.9 4.4 5.9 4.13 5.63 V V V V V VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 0 0 0 0.15 0.16 2.0 0.1 0.1 0.1 0.26 0.26 0.1 1.0 V V V V V A A pF Min Typ Max Unit
Tamb = -40 C to +85 C
Tamb = -40 C to +125 C VOH HIGH-level output voltage
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
5 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Table 7. Static characteristics for 74HC2G17 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC input leakage current supply current VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V 0.1 0.1 0.1 0.4 0.4 1.0 20.0 V V V V V A A Min Typ Max Unit
Table 8. Static characteristics for 74HCT2G17 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 C VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA II ICC ICC CI VOH input leakage current supply current additional supply current input capacitance HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA II ICC ICC input leakage current supply current additional supply current VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC - 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 0.1 0.33 1.0 10.0 375 V V A A A 4.4 4.13 V V VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC - 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 0 0.15 2.0 0.1 0.26 0.1 1.0 300 V V A A A pF 4.4 4.18 4.5 4.32 V V Parameter Conditions Min Typ Max Unit
Tamb = -40 C to +85 C
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
6 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Table 8. Static characteristics for 74HCT2G17 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOH Parameter HIGH-level output voltage Conditions VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 A IO = -4.0 mA II ICC ICC input leakage current supply current additional supply current VI = GND or VCC; VCC = 5.5 V VI = GND or VCC; IO = 0 A; VCC = 5.5 V VI = VCC - 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 A 0.1 0.4 1.0 20.0 410 V V A A A 4.4 3.7 V V Min Typ Max Unit Tamb = -40 C to +125 C
12. Dynamic characteristics
Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HC2G17 tpd propagation delay nA to nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF tt transition time nY; see Figure 5 VCC = 2.0 V; CL = 50 pF VCC = 4.5 V; CL = 50 pF VCC = 6.0 V; CL = 50 pF CPD power dissipation capacitance VI = GND to VCC
[3] [2] [1]
25 C Typ Max
-40 C to +125 C Min Max (85 C) Max (125 C)
Unit
-
36 12 10 20 7 5 10
115 22 18 75 15 13 -
-
140 27 22 95 19 16 -
175 34 28 110 22 19 -
ns ns ns ns ns ns pF
74HC_HCT2G17_1
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Product data sheet
Rev. 01 -- 6 October 2006
7 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Table 9. Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HCT2G17 tpd tt CPD propagation delay transition time power dissipation capacitance
tpd is the same as tPLH and tPHL tt is the same as tTLH and tTHL CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs.
25 C Typ Max
-40 C to +125 C Min Max (85 C) Max (125 C)
Unit
nA to nY; see Figure 5 VCC = 4.5 V; CL = 50 pF nY; see Figure 5 VCC = 4.5 V; CL = 50 pF VI = GND to VCC - 1.5 V
[1]
[2]
21 6 10
29 15 -
-
36 19 -
45 22 -
ns ns pF
[3]
-
[1] [2] [3]
13. Waveforms
VI nA input GND tPLH VOH nY output VOL 10 % tTLH 10 % tTHL
001aaf302
VM
VM
tPHL
90 %
90 %
Measurement points are given in Table 10. VOL and VOH are typical voltage output drop that occur with the output load.
Fig 5. The data input (nA) to output (nY) propagation delays and output transition times Table 10. Type 74HC2G17 74HCT2G17 Measurement points Input VM 0.5VCC 1.3 V VI GND to VCC GND to 3.0 V tr = tf 6.0 ns 6.0 ns Output VM 0.5VCC 1.3 V
74HC_HCT2G17_1
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Product data sheet
Rev. 01 -- 6 October 2006
8 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
VCC VI D.U.T RT CL VO RL = 1 k
VCC
PULSE GENERATOR
open 50 pF
mgk563
Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times Table 11. Type 74HC2G17 74HCT2G17 Test data Input VI GND to VCC GND to 3.0 V tr, tf 6 ns 6 ns Test tPHL, tPLH open open
14. Transfer characteristics
Table 12. Transfer characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HC2G17 VT+ positive-going threshold voltage see Figure 7, Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VT- negative-going threshold voltage see Figure 7, Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VH hysteresis voltage VT+ - VT-; see Figure 7, Figure 8 and Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 0.30 0.60 0.80 0.60 1.13 1.40 1.00 1.40 1.70 0.30 0.60 0.80 1.00 1.40 1.70 1.00 1.40 1.70 V V V 0.30 1.13 1.50 0.60 1.47 2.06 0.90 2.00 2.60 0.30 1.13 1.50 0.90 2.00 2.60 0.90 2.00 2.60 V V V 1.00 2.30 3.00 1.18 2.60 3.46 1.50 3.15 4.20 1.00 2.30 3.00 1.50 3.15 4.20 1.50 3.15 4.20 V V V 25 C Typ Max -40 C to +125 C Min Max (85 C) Max (125 C) Unit
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
9 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Table 12. Transfer characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter Conditions Min 74HCT2G17 VT+ positive-going threshold voltage see Figure 7 and Figure 8 VCC = 4.5 V VCC = 5.5 V VT- negative-going threshold voltage see Figure 7 and Figure 8 VCC = 4.5 V VCC = 5.5 V VH hysteresis voltage VT+ - VT-; see Figure 7, Figure 8 and Figure 10 VCC = 4.5 V VCC = 5.5 V 0.40 0.40 0.71 0.67 0.40 0.40 V V 0.50 0.60 0.87 1.11 1.20 1.40 0.50 0.60 1.20 1.40 1.20 1.40 V V 1.20 1.40 1.58 1.78 1.90 2.10 1.20 1.40 1.90 2.10 1.90 2.10 V V 25 C Typ Max -40 C to +125 C Min Max (85 C) Max (125 C) Unit
15. Waveforms transfer characteristics
VO
VI
VT+ VT- VH
VO VI VT+
mnb154
VH VT-
mnb155
VT+ and VT- limits at 70 % and 20 %.
Fig 7. Transfer characteristic
Fig 8. Definition of VT+, VT- and VH
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
10 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
100 ICC (A)
mna028
1.0 ICC (mA) 0.8
mna029
0.6 50 0.4
0.2
0 0 1.0 VI (V) 2.0
0 0 2.5 VI (V) 5.0
a. VCC = 2.0 V
1.6 ICC (mA)
b. VCC = 4.5 V
mna030
0.8
0 0 3.0 VI (V) 6.0
c.
VCC = 6.0 V
Fig 9. Typical 74HC2G17 transfer characteristics
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
11 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
2.0 ICC (mA)
mna031
3.0 ICC (mA)
mna032
2.0
1.0
1.0
0 0 2.5 VI (V) 5.0
0 0 3.0 VI (V) 6.0
a. VCC = 4.5 V. Fig 10. Typical 74HCT2G17 transfer characteristics
b. VCC = 5.5 V.
16. Application information
The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula: Padd = fi x (tr x ICC(AV) + tf x ICC(AV)) x VCC where: Padd = additional power dissipation (W); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; tf = input fall time (ns); 90 % to 10 %; ICC(AV) = average additional supply current (A). ICC(AV) differs with positive or negative input transitions, as shown in Figure 11 and Figure 12.
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
12 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
200 ICC(AV)
(mA)
mna036
150 positive-going edge 100
50
negative-going edge 0 0 2.0 4.0 VCC (V) 6.0
Fig 11. ICC(AV) as a function of VCC for 74HC2G17; linear change of VI between 0.1VCC to 0.9VCC
200 ICC(AV) (A) 150
mna058
positive-going edge
100
50
negative-going edge
0 0 2 4 VCC (V) 6
Fig 12. ICC(AV) as a function of VCC for 74HCT2G17; linear change of VI between 0.1VCC to 0.9VCC
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
13 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
17. Package outline
Plastic surface-mounted package; 6 leads SOT363
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT363
REFERENCES IEC JEDEC JEITA SC-88
EUROPEAN PROJECTION
ISSUE DATE 04-11-08 06-03-16
Fig 13. Package outline SOT363 (SC-88)
74HC_HCT2G17_1 (c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
14 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A A1 c
1
2
3
Lp
e
bp
wM B detail X
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.1 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT457
REFERENCES IEC JEDEC JEITA SC-74
EUROPEAN PROJECTION
ISSUE DATE 05-11-07 06-03-16
Fig 14. Package outline SOT457 (SC-74)
74HC_HCT2G17_1 (c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
15 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
18. Abbreviations
Table 13. Acronym CMOS ESD HBM MM DUT Abbreviations Description Complementary Metal Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Device Under Test
19. Revision history
Table 14. Revision history Release date 20061006 Data sheet status Product data sheet Change notice Supersedes Document ID 74HC_HCT2G17_1
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
16 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
20. Legal information
20.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
20.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
20.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
20.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
21. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
74HC_HCT2G17_1
(c) NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 6 October 2006
17 of 18
NXP Semiconductors
74HC2G17; 74HCT2G17
Dual non-inverting Schmitt trigger
22. Contents
1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 14 15 16 17 18 19 20 20.1 20.2 20.3 20.4 21 22 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Transfer characteristics. . . . . . . . . . . . . . . . . . . 9 Waveforms transfer characteristics . . . . . . . . 10 Application information. . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 6 October 2006 Document identifier: 74HC_HCT2G17_1

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